/* pci.c - Generic PCI interfaces. */ /* * VAS_EBOOT -- GRand Unified Bootloader * Copyright (C) 2007,2009 Free Software Foundation, Inc. * * VAS_EBOOT is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * VAS_EBOOT is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with VAS_EBOOT. If not, see . */ #include #include #include #include #include #include VAS_EBOOT_MOD_LICENSE ("GPLv3+"); /* FIXME: correctly support 64-bit architectures. */ /* #if VAS_EBOOT_TARGET_SIZEOF_VOID_P == 4 */ struct VasEBoot_pci_dma_chunk * VasEBoot_memalign_dma32 (VasEBoot_size_t align, VasEBoot_size_t size) { void *ret; if (align < 64) align = 64; size = ALIGN_UP (size, align); ret = VasEBoot_memalign (align, size); #if VAS_EBOOT_CPU_SIZEOF_VOID_P == 8 if ((VasEBoot_addr_t) ret >> 32) { /* Shouldn't happend since the only platform in this case is x86_64-efi and it skips any regions > 4GiB because of EFI bugs anyway. */ VasEBoot_error (VAS_EBOOT_ERR_BUG, "allocation outside 32-bit range"); return 0; } #endif if (!ret) return 0; VasEBoot_arch_sync_dma_caches (ret, size); return ret; } /* FIXME: evil. */ void VasEBoot_dma_free (struct VasEBoot_pci_dma_chunk *ch) { VasEBoot_size_t size = (((struct VasEBoot_mm_header *) ch) - 1)->size * VAS_EBOOT_MM_ALIGN; VasEBoot_arch_sync_dma_caches (ch, size); VasEBoot_free (ch); } /* #endif */ #ifdef VAS_EBOOT_MACHINE_MIPS_LOONGSON volatile void * VasEBoot_dma_get_virt (struct VasEBoot_pci_dma_chunk *ch) { return (void *) ((((VasEBoot_uint32_t) ch) & 0x1fffffff) | 0xa0000000); } VasEBoot_uint32_t VasEBoot_dma_get_phys (struct VasEBoot_pci_dma_chunk *ch) { return (((VasEBoot_uint32_t) ch) & 0x1fffffff) | 0x80000000; } #else volatile void * VasEBoot_dma_get_virt (struct VasEBoot_pci_dma_chunk *ch) { return (void *) ch; } VasEBoot_uint32_t VasEBoot_dma_get_phys (struct VasEBoot_pci_dma_chunk *ch) { return (VasEBoot_uint32_t) (VasEBoot_addr_t) ch; } #endif VasEBoot_pci_address_t VasEBoot_pci_make_address (VasEBoot_pci_device_t dev, int reg) { return (1 << 31) | (dev.bus << 16) | (dev.device << 11) | (dev.function << 8) | reg; } void VasEBoot_pci_iterate (VasEBoot_pci_iteratefunc_t hook, void *hook_data) { VasEBoot_pci_device_t dev; VasEBoot_pci_address_t addr; VasEBoot_pci_id_t id; VasEBoot_uint32_t hdr; for (dev.bus = 0; dev.bus < VAS_EBOOT_PCI_NUM_BUS; dev.bus++) { for (dev.device = 0; dev.device < VAS_EBOOT_PCI_NUM_DEVICES; dev.device++) { for (dev.function = 0; dev.function < 8; dev.function++) { addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_PCI_ID); id = VasEBoot_pci_read (addr); /* Check if there is a device present. */ if (id >> 16 == 0xFFFF) { if (dev.function == 0) /* Devices are required to implement function 0, so if it's missing then there is no device here. */ break; else continue; } if (hook (dev, id, hook_data)) return; /* Probe only func = 0 if the device if not multifunction */ if (dev.function == 0) { addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_CACHELINE); hdr = VasEBoot_pci_read (addr); if (!(hdr & 0x800000)) break; } } } } } VasEBoot_uint8_t VasEBoot_pci_find_capability (VasEBoot_pci_device_t dev, VasEBoot_uint8_t cap) { VasEBoot_uint8_t pos = 0x34; int ttl = 48; while (ttl--) { VasEBoot_uint8_t id; VasEBoot_pci_address_t addr; addr = VasEBoot_pci_make_address (dev, pos); pos = VasEBoot_pci_read_byte (addr); if (pos < 0x40) break; pos &= ~3; addr = VasEBoot_pci_make_address (dev, pos); id = VasEBoot_pci_read_byte (addr); if (id == 0xff) break; if (id == cap) return pos; pos++; } return 0; }