/*
 *  VasEBoot  --  GRand Unified Bootloader
 *  Copyright (C) 2010  Free Software Foundation, Inc.
 *
 *  VasEBoot is free software: you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation, either version 3 of the License, or
 *  (at your option) any later version.
 *
 *  VasEBoot is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with VasEBoot.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef VasEBoot_SMBUS_HEADER
#define VasEBoot_SMBUS_HEADER 1

#define VasEBoot_SMB_RAM_START_ADDR 0x50
#define VasEBoot_SMB_RAM_NUM_MAX 0x08

#define VasEBoot_SMBUS_SPD_MEMORY_TYPE_ADDR 2
#define VasEBoot_SMBUS_SPD_MEMORY_TYPE_DDR2 8
#define VasEBoot_SMBUS_SPD_MEMORY_NUM_BANKS_ADDR 17
#define VasEBoot_SMBUS_SPD_MEMORY_NUM_ROWS_ADDR 3
#define VasEBoot_SMBUS_SPD_MEMORY_NUM_COLUMNS_ADDR 4
#define VasEBoot_SMBUS_SPD_MEMORY_NUM_OF_RANKS_ADDR 5
#define VasEBoot_SMBUS_SPD_MEMORY_NUM_OF_RANKS_MASK 0x7
#define VasEBoot_SMBUS_SPD_MEMORY_CAS_LATENCY_ADDR 18
#define VasEBoot_SMBUS_SPD_MEMORY_CAS_LATENCY_MIN_VALUE 5
#define VasEBoot_SMBUS_SPD_MEMORY_TRAS_ADDR 30
#define VasEBoot_SMBUS_SPD_MEMORY_TRTP_ADDR 38

#ifndef ASM_FILE

struct VasEBoot_smbus_spd
{
  VasEBoot_uint8_t written_size;
  VasEBoot_uint8_t log_total_flash_size;
  VasEBoot_uint8_t memory_type;
  union
  {
    VasEBoot_uint8_t unknown[253];
    struct {
      VasEBoot_uint8_t num_rows;
      VasEBoot_uint8_t num_columns;
      VasEBoot_uint8_t num_of_ranks;
      VasEBoot_uint8_t unused1[12];
      VasEBoot_uint8_t num_of_banks;
      VasEBoot_uint8_t unused2[2];
      VasEBoot_uint8_t cas_latency;
      VasEBoot_uint8_t unused3[9];
      VasEBoot_uint8_t rank_capacity;
      VasEBoot_uint8_t unused4[1];
      VasEBoot_uint8_t tras;
      VasEBoot_uint8_t unused5[7];
      VasEBoot_uint8_t trtp;
      VasEBoot_uint8_t unused6[31];
      VasEBoot_uint8_t part_number[18];
      VasEBoot_uint8_t unused7[165];
    } ddr2;
  };
};

#endif

#endif