/* lspci.c - List PCI devices. */
/*
* VAS_EBOOT -- GRand Unified Bootloader
* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
*
* VAS_EBOOT is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* VAS_EBOOT is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with VAS_EBOOT. If not, see .
*/
#include
#include
#include
#include
#include
#include
#include
VAS_EBOOT_MOD_LICENSE ("GPLv3+");
struct pci_register
{
const char *name;
VasEBoot_uint16_t addr;
unsigned size;
};
static struct pci_register pci_registers[] =
{
{"VENDOR_ID", VAS_EBOOT_PCI_REG_VENDOR , 2},
{"DEVICE_ID", VAS_EBOOT_PCI_REG_DEVICE , 2},
{"COMMAND", VAS_EBOOT_PCI_REG_COMMAND , 2},
{"STATUS", VAS_EBOOT_PCI_REG_STATUS , 2},
{"REVISION", VAS_EBOOT_PCI_REG_REVISION , 1},
{"CLASS_PROG", VAS_EBOOT_PCI_REG_CLASS + 1 , 1},
{"CLASS_DEVICE", VAS_EBOOT_PCI_REG_CLASS + 2 , 2},
{"CACHE_LINE_SIZE", VAS_EBOOT_PCI_REG_CACHELINE , 1},
{"LATENCY_TIMER", VAS_EBOOT_PCI_REG_LAT_TIMER , 1},
{"HEADER_TYPE", VAS_EBOOT_PCI_REG_HEADER_TYPE , 1},
{"BIST", VAS_EBOOT_PCI_REG_BIST , 1},
{"BASE_ADDRESS_0", VAS_EBOOT_PCI_REG_ADDRESS_REG0, 4},
{"BASE_ADDRESS_1", VAS_EBOOT_PCI_REG_ADDRESS_REG1, 4},
{"BASE_ADDRESS_2", VAS_EBOOT_PCI_REG_ADDRESS_REG2, 4},
{"BASE_ADDRESS_3", VAS_EBOOT_PCI_REG_ADDRESS_REG3, 4},
{"BASE_ADDRESS_4", VAS_EBOOT_PCI_REG_ADDRESS_REG4, 4},
{"BASE_ADDRESS_5", VAS_EBOOT_PCI_REG_ADDRESS_REG5, 4},
{"CARDBUS_CIS", VAS_EBOOT_PCI_REG_CIS_POINTER , 4},
{"SUBVENDOR_ID", VAS_EBOOT_PCI_REG_SUBVENDOR , 2},
{"SUBSYSTEM_ID", VAS_EBOOT_PCI_REG_SUBSYSTEM , 2},
{"ROM_ADDRESS", VAS_EBOOT_PCI_REG_ROM_ADDRESS , 4},
{"CAP_POINTER", VAS_EBOOT_PCI_REG_CAP_POINTER , 1},
{"INTERRUPT_LINE", VAS_EBOOT_PCI_REG_IRQ_LINE , 1},
{"INTERRUPT_PIN", VAS_EBOOT_PCI_REG_IRQ_PIN , 1},
{"MIN_GNT", VAS_EBOOT_PCI_REG_MIN_GNT , 1},
{"MAX_LAT", VAS_EBOOT_PCI_REG_MIN_GNT , 1},
};
static const struct VasEBoot_arg_option options[] =
{
{0, 'd', 0, N_("Select device by vendor and device IDs."),
N_("[vendor]:[device]"), ARG_TYPE_STRING},
{0, 's', 0, N_("Select device by its position on the bus."),
N_("[bus]:[slot][.func]"), ARG_TYPE_STRING},
{0, 'v', 0, N_("Save read value into variable VARNAME."),
N_("VARNAME"), ARG_TYPE_STRING},
{0, 0, 0, 0, 0, 0}
};
static VasEBoot_uint32_t pciid_check_mask, pciid_check_value;
static int bus, device, function;
static int check_bus, check_device, check_function;
static VasEBoot_uint32_t write_mask, regwrite;
static int regsize;
static VasEBoot_uint16_t regaddr;
static const char *varname;
static int
VasEBoot_setpci_iter (VasEBoot_pci_device_t dev, VasEBoot_pci_id_t pciid,
void *data __attribute__ ((unused)))
{
VasEBoot_uint32_t regval = 0;
VasEBoot_pci_address_t addr;
if ((pciid & pciid_check_mask) != pciid_check_value)
return 0;
if (check_bus && VasEBoot_pci_get_bus (dev) != bus)
return 0;
if (check_device && VasEBoot_pci_get_device (dev) != device)
return 0;
if (check_function && VasEBoot_pci_get_function (dev) != function)
return 0;
addr = VasEBoot_pci_make_address (dev, regaddr);
switch (regsize)
{
case 1:
regval = VasEBoot_pci_read_byte (addr);
break;
case 2:
regval = VasEBoot_pci_read_word (addr);
break;
case 4:
regval = VasEBoot_pci_read (addr);
break;
}
if (varname)
{
char buf[sizeof ("XXXXXXXX")];
VasEBoot_snprintf (buf, sizeof (buf), "%x", regval);
VasEBoot_env_set (varname, buf);
return 1;
}
if (!write_mask)
{
VasEBoot_printf (_("Register %x of %x:%02x.%x is %x\n"), regaddr,
VasEBoot_pci_get_bus (dev),
VasEBoot_pci_get_device (dev),
VasEBoot_pci_get_function (dev),
regval);
return 0;
}
regval = (regval & ~write_mask) | regwrite;
switch (regsize)
{
case 1:
VasEBoot_pci_write_byte (addr, regval);
break;
case 2:
VasEBoot_pci_write_word (addr, regval);
break;
case 4:
VasEBoot_pci_write (addr, regval);
break;
}
return 0;
}
static VasEBoot_err_t
VasEBoot_cmd_setpci (VasEBoot_extcmd_context_t ctxt, int argc, char **argv)
{
const char *ptr;
unsigned i;
pciid_check_value = 0;
pciid_check_mask = 0;
if (ctxt->state[0].set)
{
ptr = ctxt->state[0].arg;
pciid_check_value |= (VasEBoot_strtoul (ptr, &ptr, 16) & 0xffff);
if (VasEBoot_errno == VAS_EBOOT_ERR_BAD_NUMBER)
{
VasEBoot_errno = VAS_EBOOT_ERR_NONE;
ptr = ctxt->state[0].arg;
}
else
pciid_check_mask |= 0xffff;
if (VasEBoot_errno)
return VasEBoot_errno;
if (*ptr != ':')
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT, N_("missing `%c' symbol"), ':');
ptr++;
pciid_check_value |= (VasEBoot_strtoul (ptr, &ptr, 16) & 0xffff) << 16;
if (VasEBoot_errno == VAS_EBOOT_ERR_BAD_NUMBER)
VasEBoot_errno = VAS_EBOOT_ERR_NONE;
else
pciid_check_mask |= 0xffff0000;
}
pciid_check_value &= pciid_check_mask;
check_bus = check_device = check_function = 0;
if (ctxt->state[1].set)
{
const char *optr;
ptr = ctxt->state[1].arg;
optr = ptr;
bus = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno == VAS_EBOOT_ERR_BAD_NUMBER)
{
VasEBoot_errno = VAS_EBOOT_ERR_NONE;
ptr = optr;
}
else
check_bus = 1;
if (VasEBoot_errno)
return VasEBoot_errno;
if (*ptr != ':')
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT, N_("missing `%c' symbol"), ':');
ptr++;
optr = ptr;
device = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno == VAS_EBOOT_ERR_BAD_NUMBER)
{
VasEBoot_errno = VAS_EBOOT_ERR_NONE;
ptr = optr;
}
else
check_device = 1;
if (*ptr == '.')
{
ptr++;
function = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno)
return VasEBoot_errno;
check_function = 1;
}
}
if (ctxt->state[2].set)
varname = ctxt->state[2].arg;
else
varname = NULL;
write_mask = 0;
if (argc != 1)
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT, N_("one argument expected"));
ptr = argv[0];
for (i = 0; i < ARRAY_SIZE (pci_registers); i++)
{
if (VasEBoot_strncmp (ptr, pci_registers[i].name,
VasEBoot_strlen (pci_registers[i].name)) == 0)
break;
}
if (i == ARRAY_SIZE (pci_registers))
{
regsize = 0;
regaddr = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno)
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT, "unknown register");
}
else
{
regaddr = pci_registers[i].addr;
regsize = pci_registers[i].size;
ptr += VasEBoot_strlen (pci_registers[i].name);
}
if (VasEBoot_errno)
return VasEBoot_errno;
if (*ptr == '+')
{
ptr++;
regaddr += VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno)
return VasEBoot_errno;
}
if (VasEBoot_memcmp (ptr, ".L", sizeof (".L") - 1) == 0
|| VasEBoot_memcmp (ptr, ".l", sizeof (".l") - 1) == 0)
{
regsize = 4;
ptr += sizeof (".l") - 1;
}
else if (VasEBoot_memcmp (ptr, ".W", sizeof (".W") - 1) == 0
|| VasEBoot_memcmp (ptr, ".w", sizeof (".w") - 1) == 0)
{
regsize = 2;
ptr += sizeof (".w") - 1;
}
else if (VasEBoot_memcmp (ptr, ".B", sizeof (".B") - 1) == 0
|| VasEBoot_memcmp (ptr, ".b", sizeof (".b") - 1) == 0)
{
regsize = 1;
ptr += sizeof (".b") - 1;
}
if (!regsize)
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT,
"unknown register size");
write_mask = 0;
if (*ptr == '=')
{
ptr++;
regwrite = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno)
return VasEBoot_errno;
write_mask = 0xffffffff;
if (*ptr == ':')
{
ptr++;
write_mask = VasEBoot_strtoul (ptr, &ptr, 16);
if (VasEBoot_errno)
return VasEBoot_errno;
}
regwrite &= write_mask;
}
if (write_mask && varname)
return VasEBoot_error (VAS_EBOOT_ERR_BAD_ARGUMENT,
"option -v isn't valid for writes");
VasEBoot_pci_iterate (VasEBoot_setpci_iter, NULL);
return VAS_EBOOT_ERR_NONE;
}
static VasEBoot_extcmd_t cmd;
VAS_EBOOT_MOD_INIT(setpci)
{
cmd = VasEBoot_register_extcmd_lockdown ("setpci", VasEBoot_cmd_setpci, 0,
N_("[-s POSITION] [-d DEVICE] [-v VAR] "
"REGISTER[=VALUE[:MASK]]"),
N_("Manipulate PCI devices."), options);
}
VAS_EBOOT_MOD_FINI(setpci)
{
VasEBoot_unregister_extcmd (cmd);
}