/*
 *  VAS_EBOOT  --  GRand Unified Bootloader
 *  Copyright (C) 2010  Free Software Foundation, Inc.
 *
 *  VAS_EBOOT is free software: you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation, either version 3 of the License, or
 *  (at your option) any later version.
 *
 *  VAS_EBOOT is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with VAS_EBOOT.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef VAS_EBOOT_VGA_HEADER
#define VAS_EBOOT_VGA_HEADER	1

#ifndef VAS_EBOOT_MACHINE_MIPS_QEMU_MIPS
#include <VasEBoot/pci.h>
#else
#include <VasEBoot/cpu/io.h>
#define VAS_EBOOT_MACHINE_PCI_IO_BASE  0xb4000000
#endif

#include <VasEBoot/vgaregs.h>

static inline void
VasEBoot_vga_gr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_INDEX);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_DATA);
}

static inline VasEBoot_uint8_t
VasEBoot_vga_gr_read (VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_INDEX);
  return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_DATA);
}

static inline void
VasEBoot_vga_cr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_INDEX);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_DATA);
}

static inline VasEBoot_uint8_t
VasEBoot_vga_cr_read (VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_INDEX);
  return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_DATA);
}

static inline void
VasEBoot_vga_cr_bw_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_INDEX);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_DATA);
}

static inline VasEBoot_uint8_t
VasEBoot_vga_cr_bw_read (VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_INDEX);
  return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_DATA);
}

static inline void
VasEBoot_vga_sr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_INDEX);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_DATA);
}

static inline VasEBoot_uint8_t
VasEBoot_vga_sr_read (VasEBoot_uint8_t addr)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_INDEX);
  return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_DATA);
}

static inline void
VasEBoot_vga_palette_read (VasEBoot_uint8_t addr, VasEBoot_uint8_t *r, VasEBoot_uint8_t *g,
		       VasEBoot_uint8_t *b)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_READ_INDEX);
  *r = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
  *g = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
  *b = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
}

static inline void
VasEBoot_vga_palette_write (VasEBoot_uint8_t addr, VasEBoot_uint8_t r, VasEBoot_uint8_t g,
			VasEBoot_uint8_t b)
{
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_WRITE_INDEX);
  VasEBoot_outb (r, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
  VasEBoot_outb (g, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
  VasEBoot_outb (b, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
}

static inline void
VasEBoot_vga_write_arx (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
{
  VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_INPUT_STATUS1_REGISTER);
  VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + 0x3ba);

  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
  VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX_READ);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
}

static inline VasEBoot_uint8_t
VasEBoot_vga_read_arx (VasEBoot_uint8_t addr)
{
  VasEBoot_uint8_t val;
  VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_INPUT_STATUS1_REGISTER);
  VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
  val = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX_READ);
  VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
  return val;
}

#endif