vaseboot/VasEBoot-core/kern/mips/loongson/init.c

/*
 *  VAS_EBOOT  --  GRand Unified Bootloader
 *  Copyright (C) 2009,2010  Free Software Foundation, Inc.
 *
 *  VAS_EBOOT is free software: you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation, either version 3 of the License, or
 *  (at your option) any later version.
 *
 *  VAS_EBOOT is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with VAS_EBOOT.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <VasEBoot/kernel.h>
#include <VasEBoot/misc.h>
#include <VasEBoot/env.h>
#include <VasEBoot/time.h>
#include <VasEBoot/types.h>
#include <VasEBoot/misc.h>
#include <VasEBoot/mm.h>
#include <VasEBoot/machine/time.h>
#include <VasEBoot/machine/kernel.h>
#include <VasEBoot/machine/memory.h>
#include <VasEBoot/memory.h>
#include <VasEBoot/mips/loongson.h>
#include <VasEBoot/cs5536.h>
#include <VasEBoot/term.h>
#include <VasEBoot/cpu/memory.h>
#include <VasEBoot/i18n.h>
#include <VasEBoot/video.h>
#include <VasEBoot/terminfo.h>
#include <VasEBoot/keyboard_layouts.h>
#include <VasEBoot/serial.h>
#include <VasEBoot/loader.h>
#include <VasEBoot/at_keyboard.h>

VasEBoot_err_t
VasEBoot_machine_mmap_iterate (VasEBoot_memory_hook_t hook, void *hook_data)
{
  hook (VAS_EBOOT_ARCH_LOWMEMPSTART, VasEBoot_arch_memsize << 20,
	VAS_EBOOT_MEMORY_AVAILABLE, hook_data);
  hook (VAS_EBOOT_ARCH_HIGHMEMPSTART, VasEBoot_arch_highmemsize << 20,
	VAS_EBOOT_MEMORY_AVAILABLE, hook_data);
  return VAS_EBOOT_ERR_NONE;
}

/* Helper for init_pci.  */
static int
set_card (VasEBoot_pci_device_t dev, VasEBoot_pci_id_t pciid,
	  void *data __attribute__ ((unused)))
{
  VasEBoot_pci_address_t addr;
  /* We could use VasEBoot_pci_assign_addresses for this but we prefer to
     have exactly same memory map as on pmon.  */
  switch (pciid)
    {
    case VAS_EBOOT_LOONGSON_OHCI_PCIID:
      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_ADDRESS_REG0);
      VasEBoot_pci_write (addr, 0x5025000);
      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_COMMAND);
      VasEBoot_pci_write_word (addr, VAS_EBOOT_PCI_COMMAND_SERR_ENABLE
			   | VAS_EBOOT_PCI_COMMAND_PARITY_ERROR
			   | VAS_EBOOT_PCI_COMMAND_BUS_MASTER
			   | VAS_EBOOT_PCI_COMMAND_MEM_ENABLED);

      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_STATUS);
      VasEBoot_pci_write_word (addr, 0x0200 | VAS_EBOOT_PCI_STATUS_CAPABILITIES);
      break;
    case VAS_EBOOT_LOONGSON_EHCI_PCIID:
      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_ADDRESS_REG0);
      VasEBoot_pci_write (addr, 0x5026000);
      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_COMMAND);
      VasEBoot_pci_write_word (addr, VAS_EBOOT_PCI_COMMAND_SERR_ENABLE
			   | VAS_EBOOT_PCI_COMMAND_PARITY_ERROR
			   | VAS_EBOOT_PCI_COMMAND_BUS_MASTER
			   | VAS_EBOOT_PCI_COMMAND_MEM_ENABLED);

      addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_STATUS);
      VasEBoot_pci_write_word (addr, (1 << VAS_EBOOT_PCI_STATUS_DEVSEL_TIMING_SHIFT)
			   | VAS_EBOOT_PCI_STATUS_CAPABILITIES);
      break;
    }
  return 0;
}

static void
init_pci (void)
{
  *((volatile VasEBoot_uint32_t *) VAS_EBOOT_CPU_LOONGSON_PCI_HIT1_SEL_LO) = 0x8000000c;
  *((volatile VasEBoot_uint32_t *) VAS_EBOOT_CPU_LOONGSON_PCI_HIT1_SEL_HI) = 0xffffffff;

  /* Setup PCI controller.  */
  *((volatile VasEBoot_uint16_t *) (VAS_EBOOT_MACHINE_PCI_CONTROLLER_HEADER
				+ VAS_EBOOT_PCI_REG_COMMAND))
    = VAS_EBOOT_PCI_COMMAND_PARITY_ERROR | VAS_EBOOT_PCI_COMMAND_BUS_MASTER
    | VAS_EBOOT_PCI_COMMAND_MEM_ENABLED;
  *((volatile VasEBoot_uint16_t *) (VAS_EBOOT_MACHINE_PCI_CONTROLLER_HEADER
				+ VAS_EBOOT_PCI_REG_STATUS))
    = (1 << VAS_EBOOT_PCI_STATUS_DEVSEL_TIMING_SHIFT)
    | VAS_EBOOT_PCI_STATUS_FAST_B2B_CAPABLE | VAS_EBOOT_PCI_STATUS_66MHZ_CAPABLE
    | VAS_EBOOT_PCI_STATUS_CAPABILITIES;

  *((volatile VasEBoot_uint32_t *) (VAS_EBOOT_MACHINE_PCI_CONTROLLER_HEADER
				+ VAS_EBOOT_PCI_REG_CACHELINE)) = 0xff;
  *((volatile VasEBoot_uint32_t *) (VAS_EBOOT_MACHINE_PCI_CONTROLLER_HEADER
				+ VAS_EBOOT_PCI_REG_ADDRESS_REG0))
    = 0x80000000 | VAS_EBOOT_PCI_ADDR_MEM_TYPE_64 | VAS_EBOOT_PCI_ADDR_MEM_PREFETCH;
  *((volatile VasEBoot_uint32_t *) (VAS_EBOOT_MACHINE_PCI_CONTROLLER_HEADER
				+ VAS_EBOOT_PCI_REG_ADDRESS_REG1)) = 0;

  VasEBoot_pci_iterate (set_card, NULL);
}

void
VasEBoot_machine_init (void)
{
  VasEBoot_addr_t modend;
  VasEBoot_uint32_t prid;

  asm volatile ("mfc0 %0, " VAS_EBOOT_CPU_LOONGSON_COP0_PRID : "=r" (prid));

  switch (prid)
    {
      /* Loongson 2E.  */
    case 0x6302:
      VasEBoot_arch_machine = VAS_EBOOT_ARCH_MACHINE_FULOONG2E;
      VasEBoot_bonito_type = VAS_EBOOT_BONITO_2F;
      break;
      /* Loongson 2F.  */
    case 0x6303:
      if (VasEBoot_arch_machine != VAS_EBOOT_ARCH_MACHINE_FULOONG2F
	  && VasEBoot_arch_machine != VAS_EBOOT_ARCH_MACHINE_YEELOONG)
	VasEBoot_arch_machine = VAS_EBOOT_ARCH_MACHINE_YEELOONG;
      VasEBoot_bonito_type = VAS_EBOOT_BONITO_2F;
      break;
      /* Loongson 3A. */
    case 0x6305:
      VasEBoot_arch_machine = VAS_EBOOT_ARCH_MACHINE_YEELOONG_3A;
      VasEBoot_bonito_type = VAS_EBOOT_BONITO_3A;
      break;
    }

  /* FIXME: measure this.  */
  if (VasEBoot_arch_busclock == 0)
    {
      VasEBoot_arch_busclock = 66000000;
      VasEBoot_arch_cpuclock = 797000000;
    }

  VasEBoot_install_get_time_ms (VasEBoot_rtc_get_time_ms);

  if (VasEBoot_arch_memsize == 0)
    {
      VasEBoot_port_t smbbase;
      VasEBoot_err_t err;
      VasEBoot_pci_device_t dev;
      struct VasEBoot_smbus_spd spd;
      unsigned totalmem;
      int i;

      if (!VasEBoot_cs5536_find (&dev))
	VasEBoot_fatal ("No CS5536 found\n");

      err = VasEBoot_cs5536_init_smbus (dev, 0x7ff, &smbbase);
      if (err)
	VasEBoot_fatal ("Couldn't init SMBus: %s\n", VasEBoot_errmsg);

      /* Yeeloong and Fuloong have only one memory slot.  */
      err = VasEBoot_cs5536_read_spd (smbbase, VAS_EBOOT_SMB_RAM_START_ADDR, &spd);
      if (err)
	VasEBoot_fatal ("Couldn't read SPD: %s\n", VasEBoot_errmsg);
      for (i = 5; i < 13; i++)
	if (spd.ddr2.rank_capacity & (1 << (i & 7)))
	  break;
      /* Something is wrong.  */
      if (i == 13)
	totalmem = 256;
      else
	totalmem = ((spd.ddr2.num_of_ranks
		     & VAS_EBOOT_SMBUS_SPD_MEMORY_NUM_OF_RANKS_MASK) + 1) << (i + 2);

      if (totalmem >= 256)
	{
	  VasEBoot_arch_memsize = 256;
	  VasEBoot_arch_highmemsize = totalmem - 256;
	}
      else
	{
	  VasEBoot_arch_memsize = totalmem;
	  VasEBoot_arch_highmemsize = 0;
	}

      VasEBoot_cs5536_init_geode (dev);

      init_pci ();
    }

  modend = VasEBoot_modules_get_end ();
  VasEBoot_mm_init_region ((void *) modend, (VasEBoot_arch_memsize << 20)
		       - (modend - VAS_EBOOT_ARCH_LOWMEMVSTART));
  /* FIXME: use upper memory as well.  */

  /* Initialize output terminal (can't be done earlier, as gfxterm
     relies on a working heap.  */
  VasEBoot_video_sm712_init ();
  VasEBoot_video_sis315pro_init ();
  VasEBoot_video_radeon_fuloong2e_init ();
  VasEBoot_video_radeon_yeeloong3a_init ();
  VasEBoot_font_init ();
  VasEBoot_gfxterm_init ();

  VasEBoot_keylayouts_init ();
  if (VasEBoot_arch_machine == VAS_EBOOT_ARCH_MACHINE_YEELOONG
      || VasEBoot_arch_machine == VAS_EBOOT_ARCH_MACHINE_YEELOONG_3A)
    VasEBoot_at_keyboard_init ();

  VasEBoot_terminfo_init ();
  VasEBoot_serial_init ();

  VasEBoot_boot_init ();
}

void
VasEBoot_machine_fini (int flags __attribute__ ((unused)))
{
}

static int
halt_via (VasEBoot_pci_device_t dev, VasEBoot_pci_id_t pciid,
	  void *data __attribute__ ((unused)))
{
  VasEBoot_uint16_t pm;
  VasEBoot_pci_address_t addr;

  if (pciid != 0x30571106)
    return 0;

  addr = VasEBoot_pci_make_address (dev, 0x40);
  pm = VasEBoot_pci_read (addr) & ~1;

  if (pm == 0)
    {
      VasEBoot_pci_write (addr, 0x1801);
      pm = 0x1800;
    }

  addr = VasEBoot_pci_make_address (dev, 0x80);
  VasEBoot_pci_write_byte (addr, 0xff);

  addr = VasEBoot_pci_make_address (dev, VAS_EBOOT_PCI_REG_COMMAND);
  VasEBoot_pci_write_word (addr, VasEBoot_pci_read_word (addr) | VAS_EBOOT_PCI_COMMAND_IO_ENABLED);

  /* FIXME: This one is derived from qemu. Check on real hardware.  */
  VasEBoot_outw (0x2000, pm + 4 + VAS_EBOOT_MACHINE_PCI_IO_BASE);
  VasEBoot_millisleep (5000);

  return 0;
}

void
VasEBoot_halt (void)
{
  switch (VasEBoot_arch_machine)
    {
    case VAS_EBOOT_ARCH_MACHINE_FULOONG2E:
      VasEBoot_pci_iterate (halt_via, NULL);
      break;
    case VAS_EBOOT_ARCH_MACHINE_FULOONG2F:
      {
	VasEBoot_pci_device_t dev;
	VasEBoot_port_t p;
	if (VasEBoot_cs5536_find (&dev))
	  {
	    p = (VasEBoot_cs5536_read_msr (dev, VAS_EBOOT_CS5536_MSR_GPIO_BAR)
		 & VAS_EBOOT_CS5536_LBAR_ADDR_MASK) + VAS_EBOOT_MACHINE_PCI_IO_BASE;
	    VasEBoot_outl ((1 << 13), p + 4);
	    VasEBoot_outl ((1 << 29), p);
	    VasEBoot_millisleep (5000);
	  }
      }
      break;
    case VAS_EBOOT_ARCH_MACHINE_YEELOONG:
      VasEBoot_outb (VasEBoot_inb (VAS_EBOOT_CPU_LOONGSON_GPIOCFG)
		 & ~VAS_EBOOT_CPU_YEELOONG_SHUTDOWN_GPIO, VAS_EBOOT_CPU_LOONGSON_GPIOCFG);
      VasEBoot_millisleep (1500);
      break;
    case VAS_EBOOT_ARCH_MACHINE_YEELOONG_3A:
      VasEBoot_millisleep (1);
      VasEBoot_outb (0x4e, VAS_EBOOT_MACHINE_PCI_IO_BASE_3A | 0x66);
      VasEBoot_millisleep (1);
      VasEBoot_outb (2, VAS_EBOOT_MACHINE_PCI_IO_BASE_3A | 0x62);
      VasEBoot_millisleep (5000);
      break;
    }

  VasEBoot_puts_ (N_("Shutdown failed"));
  VasEBoot_refresh ();
  while (1);
}

void
VasEBoot_exit (void)
{
  VasEBoot_halt ();
}

void
VasEBoot_machine_get_bootlocation (char **device __attribute__ ((unused)),
			       char **path __attribute__ ((unused)))
{
}

extern char _end[];
VasEBoot_addr_t VasEBoot_modbase = (VasEBoot_addr_t) _end;