vaseboot/include/VasEBoot/i386/pci.h

106 lines
3.0 KiB
C

/*
* VAS_EBOOT -- GRand Unified Bootloader
* Copyright (C) 2008,2009 Free Software Foundation, Inc.
*
* VAS_EBOOT is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* VAS_EBOOT is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with VAS_EBOOT. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef VAS_EBOOT_CPU_PCI_H
#define VAS_EBOOT_CPU_PCI_H 1
#include <VasEBoot/types.h>
#include <VasEBoot/i386/io.h>
#define VAS_EBOOT_MACHINE_PCI_IO_BASE 0
#define VAS_EBOOT_PCI_ADDR_REG 0xcf8
#define VAS_EBOOT_PCI_DATA_REG 0xcfc
#define VAS_EBOOT_PCI_NUM_BUS 256
#define VAS_EBOOT_PCI_NUM_DEVICES 32
static inline VasEBoot_uint32_t
VasEBoot_pci_read (VasEBoot_pci_address_t addr)
{
VasEBoot_outl (addr, VAS_EBOOT_PCI_ADDR_REG);
return VasEBoot_inl (VAS_EBOOT_PCI_DATA_REG);
}
static inline VasEBoot_uint16_t
VasEBoot_pci_read_word (VasEBoot_pci_address_t addr)
{
VasEBoot_outl (addr & ~3, VAS_EBOOT_PCI_ADDR_REG);
return VasEBoot_inw (VAS_EBOOT_PCI_DATA_REG + (addr & 3));
}
static inline VasEBoot_uint8_t
VasEBoot_pci_read_byte (VasEBoot_pci_address_t addr)
{
VasEBoot_outl (addr & ~3, VAS_EBOOT_PCI_ADDR_REG);
return VasEBoot_inb (VAS_EBOOT_PCI_DATA_REG + (addr & 3));
}
static inline void
VasEBoot_pci_write (VasEBoot_pci_address_t addr, VasEBoot_uint32_t data)
{
VasEBoot_outl (addr, VAS_EBOOT_PCI_ADDR_REG);
VasEBoot_outl (data, VAS_EBOOT_PCI_DATA_REG);
}
static inline void
VasEBoot_pci_write_word (VasEBoot_pci_address_t addr, VasEBoot_uint16_t data)
{
VasEBoot_outl (addr & ~3, VAS_EBOOT_PCI_ADDR_REG);
VasEBoot_outw (data, VAS_EBOOT_PCI_DATA_REG + (addr & 3));
}
static inline void
VasEBoot_pci_write_byte (VasEBoot_pci_address_t addr, VasEBoot_uint8_t data)
{
VasEBoot_outl (addr & ~3, VAS_EBOOT_PCI_ADDR_REG);
VasEBoot_outb (data, VAS_EBOOT_PCI_DATA_REG + (addr & 3));
}
#ifndef VAS_EBOOT_MACHINE_IEEE1275
static inline volatile void *
VasEBoot_pci_device_map_range (VasEBoot_pci_device_t dev __attribute__ ((unused)),
VasEBoot_addr_t base,
VasEBoot_size_t size __attribute__ ((unused)))
{
return (volatile void *) base;
}
static inline void
VasEBoot_pci_device_unmap_range (VasEBoot_pci_device_t dev __attribute__ ((unused)),
volatile void *mem __attribute__ ((unused)),
VasEBoot_size_t size __attribute__ ((unused)))
{
}
#else
volatile void *
VasEBoot_pci_device_map_range (VasEBoot_pci_device_t dev,
VasEBoot_addr_t base,
VasEBoot_size_t size);
void
VasEBoot_pci_device_unmap_range (VasEBoot_pci_device_t dev,
volatile void *mem,
VasEBoot_size_t size);
#endif
#endif /* VAS_EBOOT_CPU_PCI_H */