130 lines
4.8 KiB
C
130 lines
4.8 KiB
C
/*
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* VAS_EBOOT -- GRand Unified Bootloader
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* Copyright (C) 2010 Free Software Foundation, Inc.
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*
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* VAS_EBOOT is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* VAS_EBOOT is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with VAS_EBOOT. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef VAS_EBOOT_VGA_HEADER
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#define VAS_EBOOT_VGA_HEADER 1
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#ifndef VAS_EBOOT_MACHINE_MIPS_QEMU_MIPS
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#include <VasEBoot/pci.h>
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#else
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#include <VasEBoot/cpu/io.h>
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#define VAS_EBOOT_MACHINE_PCI_IO_BASE 0xb4000000
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#endif
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#include <VasEBoot/vgaregs.h>
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static inline void
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VasEBoot_vga_gr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_INDEX);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_DATA);
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}
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static inline VasEBoot_uint8_t
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VasEBoot_vga_gr_read (VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_INDEX);
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return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_GR_DATA);
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}
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static inline void
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VasEBoot_vga_cr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_INDEX);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_DATA);
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}
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static inline VasEBoot_uint8_t
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VasEBoot_vga_cr_read (VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_INDEX);
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return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_DATA);
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}
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static inline void
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VasEBoot_vga_cr_bw_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_INDEX);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_DATA);
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}
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static inline VasEBoot_uint8_t
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VasEBoot_vga_cr_bw_read (VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_INDEX);
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return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_CR_BW_DATA);
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}
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static inline void
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VasEBoot_vga_sr_write (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_INDEX);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_DATA);
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}
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static inline VasEBoot_uint8_t
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VasEBoot_vga_sr_read (VasEBoot_uint8_t addr)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_INDEX);
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return VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_SR_DATA);
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}
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static inline void
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VasEBoot_vga_palette_read (VasEBoot_uint8_t addr, VasEBoot_uint8_t *r, VasEBoot_uint8_t *g,
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VasEBoot_uint8_t *b)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_READ_INDEX);
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*r = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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*g = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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*b = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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}
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static inline void
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VasEBoot_vga_palette_write (VasEBoot_uint8_t addr, VasEBoot_uint8_t r, VasEBoot_uint8_t g,
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VasEBoot_uint8_t b)
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{
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_WRITE_INDEX);
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VasEBoot_outb (r, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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VasEBoot_outb (g, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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VasEBoot_outb (b, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_PALLETTE_DATA);
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}
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static inline void
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VasEBoot_vga_write_arx (VasEBoot_uint8_t val, VasEBoot_uint8_t addr)
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{
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VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_INPUT_STATUS1_REGISTER);
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VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + 0x3ba);
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
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VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX_READ);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
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}
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static inline VasEBoot_uint8_t
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VasEBoot_vga_read_arx (VasEBoot_uint8_t addr)
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{
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VasEBoot_uint8_t val;
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VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_INPUT_STATUS1_REGISTER);
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VasEBoot_outb (addr, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
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val = VasEBoot_inb (VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX_READ);
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VasEBoot_outb (val, VAS_EBOOT_MACHINE_PCI_IO_BASE + VAS_EBOOT_VGA_IO_ARX);
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return val;
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}
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#endif
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